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Institute of Microelectronics

M.Sc. Simon Wilhelmstätter

I studied electrical engineering at the University of Ulm, where I received my B.Sc. degree with a minor in Computer Science in 2020 and my M.Sc. degree in 2023. Beginning in April 2022, I completed a 7-month internship at the Robert Bosch Research and Technology Center in Sunnyvale, CA. The title of my Master's Thesis was "Design and Implementation of the Dataflow for a Versatile Neural-Network Inference-System".

In September 2023 I started working towards my Ph.D. degree at the Institute of Microelectronics at the University of Ulm under the supervision of Prof. Dr.-Ing. Maurits Ortmanns.

Student Theses

[mt] = Master thesis, [rp] = Bachelor thesis

Past theses

  • Malte Kühne
    Performance Evaluation of an in-Memory Compute Chip [rp]
  • Julian Frimmel
    A Digital Interface for an Analog IMC Core [mt]
  • Daniel Zell
    Stochastic Methods for Side-Channel Attacks on FPGA-based Neural Network Accelerators [mt]
  • Alexander Harrer
    Enabling the Inference of Transformer Networks on a RISC-V based System [mt]
  • Mohamed Alsharkawy
    Design of a Hardware in the Loop Test Setup for Neural Network Accelerators [mt]

Publications

2025

7.
S. Wilhelmstätter, J. Conrad, J. Stark, D. Upadhyaya, M. Gay, I. Polian and M. Ortmanns, "1/2CcellV2DD? An Energy Model for Compute-in-Memory SRAM Cells", 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD), Istanbul, Turkiye, Jul. 2025.
DOI:
6.
J. Conrad, S. Wilhelmstätter, H. Mandry, P. Kässer, A. Abdelaal, R. Asthana, V. Belagiannis and M. Ortmanns, "PSumSim: A Simulator for Partial-Sum Quantization in Analog Matrix-Vector Multipliers", IEEE International Symposium on Circuits and Systems (ISCAS), London, United Kingdom, pp. 1-5, May 2025.
DOI:

2024

5.
J. Conrad, S. Wilhelmstätter, R. Asthana, V. Belagiannis and M. Ortmanns, "Differentiable Cost Model for Neural-Network Accelerator Regarding Memory Hierarchy", IEEE Transactions on Circuits and Systems I: Regular Papers ( Early Access ), Oct. 2024.
DOI:
4.
J. Conrad, J. G. Kauffman, S. Wilhelmstätter, R. Asthana, V. Belagiannis and M. Ortmanns, "Confidence Estimation and Boosting for Dynamic-Comparator Transient-Noise Analysis", 22nd IEEE Interregional NEWCAS Conference (NEWCAS), Sep. 2024.
DOI:
3.
S. Wilhelmstätter, J. Conrad, D. Upadhyaya, I. Polian and M. Ortmanns, "Enabling Power Side-Channel Attack Simulation on Mixed-Signal Neural Network Accelerators", IEEE International Conference on Omni-Layer Intelligent Systems (COINS), London, UK, Jul. 2024.
2.
J. Conrad, S. Wilhelmstätter, R. Asthana, V. Belagiannis and M. Ortmanns, "Too-Hot-to-Handle: Insights into Temperature and Noise Hyperparameters for Differentiable Neural-Architecture-Searches", 6th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Abu-Dhabi, UAE, Apr. 2024.
DOI:
1.
S. Wilhelmstätter, J. Conrad, D. Upadhyaya, I. Polian and M. Ortmanns, "Attacking a Joint Protection Scheme for Deep Neural Network Hardware Accelerators and Models", 6th IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Abu Dhabi, UAE, Apr. 2024.
DOI:

Research Assistent

Simon Wilhelmstätter